Parallel Computer Architecture and Programming, Fall 2017
| Title | Student(s) | Date of Presentation |
|---|---|---|
| Accelerating BNN Training | Andrew Pelegris, Rose Li | |
| Hardware accelerator for DNN training with using FPGAs | Pavel Klishin | |
| Multi-threading in Python and The GIL | Aparna Balagopalan, Amlan Kar | |
| Faster Training of Deep Residual Networks Using Pipelined GPU’s and RevNet | Caleb Phillips | |
| Foundations of Neuron Processing Unit Architectures: A Comparative Study of Current Neural Network and Machine Learning Accelerators | Mohammad Tabrizi | |
| Alleviating the Memory Bottleneck using On-Chip Weight Decompression for Deep Learning | Dylan Malone Stuart, Milos Nikolic, Kevin Siu | |
| Scheduling of multithreaded hardware in HLS for FPGA | Hsuan Hsiao, Yu Ting Chen | |
| Dynamic Binary PRAM-style Simulator | Alexandre Luiz Brisighello Filho, Viktor Karyofyllis | |
| Exploring the Usage of GPU in Recurrent Neural Networks Project Proposal | Bojian Zheng | |
| Benchmarking Tensorflow and MXNET in a Reinforcement Learning Context | Mohamed Akrout, Morgan Shirley | |
| Synthesizing Accurate Floating-point Computation for Different architetures | Victor Nicolet |