Tsai-chuan Wu (吳才銓)

About Me

I’m a researcher at AMD developing frontier AI techniques to accelerating (among other things) kernel optimization and chip design. Since 2025 I’ve been living and working in San Francisco. Previously, I was a researcher at Together AI and intern at Cohere and AWS. My MSc at the University of Toronto (UofT)/Vector Institute was advised by Prof. Vardan Papyan. I completed my BSc also at UofT (Victoria College).

Recent Publications | [all]

1. Opportunistic Expert Activation: Batch-Aware Expert Routing for Faster Decode Without Retraining
   Costin-Andrei Oncescu, Qingyang Wu, Wai Tong Chung, Robert Wu, Bryan Gopal, Junxiong Wang, Tri Dao, Ben Athiwaratkun
   ICML 2026 (Main Track)
   [arxiv]
2. Kitty: Accurate and Efficient 2-bit KV Cache Quantization with Dynamic Channel-wise Precision Boost
   Haojun Xia, Xiaoxia Wu, Jisen Li, Robert Wu, Junxiong Wang, Jue Wang, Chenxi Li, Aman Singhal, Alay Dilipbhai Shah, Alpay Ariyak, Donglin Zhuang, Zhongzhu Zhou, Ben Athiwaratkun, Zhen Zheng, Shuaiwen Leon Song
   MLSys 2026 (Research Track)
   [arxiv]
3. SEE-2-SOUND: Zero-Shot Spatial Environment-to-Spatial Sound
   Rishit Dagli, Shivesh Prakash, Robert Wu, Houman Khosravani
   SIGGRAPH 2025, FM-Wild @ ICML 2024
   [acm] [openreview] [arxiv] [web] [code]
4. Linguistic Collapse: Neural Collapse in (Large) Language Models
   Robert Wu, Vardan Papyan
   NeurIPS 2024 (Main Track)
   [proceedings] [arxiv] [code]

(* equal contribution)