Instruction scheduling is an NP-complete problem which allows for altering the
execution order of instructions in a function without altering the function’s
semantics. By modifying instruction execution order, CPU resource usage can be
maximized resulting in increased instruction throughput and decreased overall
execution times. We present a development environment known as COCONUT for
generating performance critical assembly code for SIMD architectures through a
high level modelling language and custom scheduling algorithms. In particular,
we are developing a continuous optimization based model of instruction
scheduling that takes advantage of stochastically generated parameters for
finding solutions on "tricky to schedule" architectures.